Little Endian
struct arbelprm_query_fw_st
No. | 名称 | 属性 | 説明 |
---|---|---|---|
1 |
arbelprm_query_fw_st | Little Endian | |
fw_rev_major[0x00010] | pseudo_bit_t | Firmware Revision - Major | |
fw_pages[0x00010] | pseudo_bit_t | Amount of physical memory to be allocated for FW usage is in 4KByte pages. | |
fw_rev_minor[0x00010] | pseudo_bit_t | Firmware Revision - Minor | |
fw_rev_subminor[0x00010] | pseudo_bit_t | Firmware Sub-minor version (Patch level). | |
cmd_interface_rev[0x00010] | pseudo_bit_t | Command Interface Interpreter Revision ID | |
reserved0[0x0000e] | pseudo_bit_t | ||
wqe_h_mode[0x00001] | pseudo_bit_t | Hermon mode. If '1', then WQE and AV format is the advanced format | |
zb_wq_cq[0x00001] | pseudo_bit_t | If '1', then ZB mode of WQ and CQ are enabled (i.e. real Memfree PRM is supported) | |
log_max_outstanding_cmd[0x00008] | pseudo_bit_t | Log2 of the maximum number of commands the HCR can support simultaneously | |
reserved1[0x00017] | pseudo_bit_t | ||
dt[0x00001] | pseudo_bit_t | Debug Trace Support | |
cmd_interface_db[0x00001] | pseudo_bit_t | Set if the device accepts commands by means of special doorbells | |
reserved2[0x0001f] | pseudo_bit_t | ||
reserved3[0x00060] | pseudo_bit_t | ||
clr_int_base_addr_h[0x00020] | pseudo_bit_t | Bits [63:32] of Clear interrupt register physical address. | |
clr_int_base_addr_l[0x00020] | pseudo_bit_t | Bits [31:0] of Clear interrupt register physical address. | |
reserved4[0x00040] | pseudo_bit_t | ||
error_buf_start_h[0x00020] | pseudo_bit_t | Read Only buffer for catastrophic error reports (physical address) | |
error_buf_start_l[0x00020] | pseudo_bit_t | Read Only buffer for catastrophic error reports (physical address) | |
error_buf_size[0x00020] | pseudo_bit_t | Size in words | |
reserved5[0x00020] | pseudo_bit_t | ||
eq_arm_base_addr_h[0x00020] | pseudo_bit_t | Bits [63:32] of EQ Arm DBs physical address. | |
eq_arm_base_addr_l[0x00020] | pseudo_bit_t | Bits [31:0] of EQ Arm DBs physical address. | |
eq_set_ci_base_addr_h[0x00020] | pseudo_bit_t | Bits [63:32] of EQ Set CI DBs Table physical address. | |
eq_set_ci_base_addr_l[0x00020] | pseudo_bit_t | Bits [31:0] of EQ Set CI DBs Table physical address. | |
cmd_db_dw1[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 1 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_dw0[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 0 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_dw3[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 3 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_dw2[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 2 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_dw5[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 5 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_dw4[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 4 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_dw7[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 7 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_dw6[0x00010] | pseudo_bit_t | offset in bytes from cmd_db_addr_base where DWord 6 of a Command Interface Doorbell should be written. Valid only if CmdInterfa | |
cmd_db_addr_base_h[0x00020] | pseudo_bit_t | High bits of cmd_db_addr_base, which cmd_db_dw offsets refer to. Valid only if CmdInterfaceDb bit is '1' | |
cmd_db_addr_base_l[0x00020] | pseudo_bit_t | Low bits of cmd_db_addr_base, which cmd_db_dw offsets refer to. Valid only if CmdInterfaceDb bit is '1' | |
reserved6[0x004c0] | pseudo_bit_t |
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